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  1. #1
    Banned asdyto's Avatar
    Join Date: Aug:2004
    Location: Ñîôèÿ
    Posts: 693

    Âúïðîñ: çà êàêâî ñëóæè CPU State?

    Êâî ïðàâÿò òåçè C1 C2 C3 C4?

    Code:
    Enhance Halt State
    All processors support the Halt State (C1). The C1 state is supported
    through the native processor instructions HLT and MWAIT and requires no
    hardware support from the chipset. In the C1 power state, the processor
    maintains the context of the system caches.
    
    Intel (R) C-STATE tech.
    Intel (R) C-STATE tech. is achieved by making the power and thermal control
    unit part of the core logic and not part of the chipset as before. Migration of the
    power and thermal management flow into the processor allows us to use a
    hardware coordination mechanism in which each core can request any C-state
    it wishes, thus allowing for individual core savings to be maximized. The CPU
    C-state is determined and entered based on the lowest common denominator
    of both cores’ requests, portraying a single CPU entity to the chipset power
    management hardware and flows. Thus, software can manage each core
    independently, while the actual power management adheres to the platform
    and CPU shared resource restrictions. Configuration options are: [C2], [C3],
    [C4] and [Disabled]. The default value is [Disabled].
    Last edited by asdyto; 4th July 2009 at 19:55.

  2. #2
    Registered abUser ike's Avatar
    Join Date: Jul:2004
    Location: sofiÿ
    Posts: 4,965
    Íàìàëÿ êîíñóìàöèÿòà íà êîìïþòúðà êîãàòî íå ãî ïîëçâàø.
    Have no fear ike iz here.
    CPU Cx486DLC@40MHz, RAM 4MB, VGA Trident 512KB, HDD Conner 160MB, Monitor 14" Color

  3. #3
    Banned
    Join Date: May:2008
    Location: 37.331689°, -122.030931°
    Posts: 5,726

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