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9th June 2005 09:01 #1
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9th June 2005 09:59 #2
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http://www.es.jamstec.go.jp/esc/eng/ES/index.html
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9th June 2005 10:02 #3
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9th June 2005 11:01 #4.... .
Originally Posted by bobytt
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9th June 2005 11:06 #5
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9th June 2005 11:09 #6Registered User
Join Date: Jul:2001
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Posts: 15,344
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9th June 2005 11:14 #7
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svetlyo - ?If you can read this, then you aren't "well" verclockd yet...!!!
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9th June 2005 14:47 #8, .
Originally Posted by svetlyo
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9th June 2005 16:05 #9NEC V10, V20, V30, - x86 ... .
Originally Posted by bobytt
(2022)
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9th June 2005 17:58 #10
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9th June 2005 19:54 #11
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* Last Words: Modding... clocking?! Never!... This is bullshit! ... well... maybe only this time... just a little...
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9th June 2005 14:23 #12:
Originally Posted by BeaZTiE
Construction of Arithmetic Processor (AP)
Each AP consists of a 4-way super-scalar unit (SU), a vector unit (VU), and main memory access control unit on a single LSI chip. The AP operates at a clock frequency of 500MHz with some circuits operating at 1GHz. Each SU is a super-scalar processor with 64KB instruction caches, 64KB data caches, and 128 general-purpose scalar registers. Branch prediction, data prefetching and out-of-order instruction execution are all employed. Each VU has 72 vector registers, each of which has 256 vector elements, along with 8 sets of six different types of vector pipelines: addition/shifting, multiplication, division, logical operations, masking, and load/store. The same type of vector pipelines works together by a single vector instruction and pipelines of different types can operate concurrently. The VU and SU support the IEEE 754 floating-point data format.
1 Chip LSI : 8Gflops
* 0.15m CMOS
* 8Layers copper interconnection
* 20.79mm x 20.79mm
* 60 million transistors
* 5185 pins
* Clock Cycle: 500MHz(1GHz)
* Power Consumption: 140W (Typ.)
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9th June 2005 14:45 #13
, PDA NEC Hitachi, Microsoft PocketPC 2002 Intel ARM .
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