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  1. #1
    Banned HEPBAKA's Avatar
    Join Date: Jan:2004
    Location: Sofia
    Posts: 1,523

    3 ?

    ..
    2.5 3 3 11 2.8 , 4 , 3 , . . , .. .
    :

    Memory Timing (1T/2T) Auto=2T
    CAS [TLC] (2; 2,5; 3) - Auto=2,5
    RAS to CAS delay [TRCD] (2T-7T) Auto=3T
    Min RAS active time [TRAS] (5T-15T) Auto=6T
    Row Recharge time [TRP] (2T-7T) Auto=2T
    Write Recovery time [TWR] (2T/3T) Auto=2T
    Write to read delay [TWTR] (1T/2T) Auto=1T
    Row cycle time [TRC] (7T-21T) Auto=8T
    Row refresh ccle [TRFC] (10T-24T) Auto=9T
    Read-to-Write time [TRWT] (1T-6T) Auto=3T
    Refresh rate [TREF] (15,6 us; 7,8 us; 3,9 us) Auto=7,8us
    Read preamble value (2,5ns-9,5ns 0.5ns) Auto=7,5ns
    Async latency value (1ns-15ns) Auto=7ns
    idle cycle limit (4,8, 16, 32, 64, 128, 256) Auto= 16
    dynamic idle cycle counter (Disabled/Enabled) Auto= Enabled
    R/W Queue Bypass count (2, 4, 8, 16) Auto=8
    bypass max (0-7) Auto=4
    DQS Skew control (increase/decrease) Auto=None
    DQS Skew value (min=0 max=255) Auto=32/0

    . , . 2,5 3 3 11 250 2,8 .

  2. #2
    () Gentu's Avatar
    Join Date: Dec:2003
    Location: SOFIA
    Posts: 3,484
    CAS Latency (CL) 2.5T
    RAS To CAS Delay (tRCD) 3T
    RAS Precharge (tRP) 3T
    RAS Active Time (tRAS) 11T
    Row Cycle Time (tRC) 13T
    Row Refresh Cycle Time (tRFC) 15T
    Command Rate (CR) 1T
    RAS To RAS Delay (tRRD) 2T
    Read To Read Delay (tRTR) 2T
    Read To Write Delay (tRTW) 4T
    Write To Read Delay (tWTR) 3T
    - !
    " , ."

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